1. Field of the Invention
This invention relates to the field of computer performance maximization. More particularly, the present invention relates to managing processor performance in a handheld computer with a flexible control system and method that is dynamically adaptable to achieve conservation of limited energy and power resources.
2. Related Art
Electronic systems and circuits have made a significant contribution towards the advancement of modern society and are utilized in a number of applications to achieve advantageous results. Numerous electronic technologies such as digital computers, calculators, audio devices, video equipment, and telephone systems facilitate increased productivity and cost reduction in analyzing and communicating data, ideas and trends in most areas of business, science, education and entertainment. Typically, electronic systems designed to produce these results consume power and energy resources for these devices, such as battery power sources in portable handheld devices (e.g., a palmtop computer), are often limited and expended quickly. Traditional attempts to conserve energy are typically limited and do not facilitate efficient energy conservation when power demands are greater than zero but less than a maximum.
Electronic systems typically perform a wide range of tasks with highly differentiated processing needs. Numerous processor based electronic systems operate at differing processing requirements or ranges. For example, a handheld computer (such as a Palm VII Connector Organizer) performing Personal Information Management (PIM) tasks may require a processor to operate at a level of one Million Instructions Per Second (MIPS), while running User Interface tasks and a radio communication protocol stack simultaneously may require a processor to operate at five to ten MIPS. Another example of differing processing levels is a V.90 modem that requires approximately twice as may comparable processing cycles per unit of time (e.g., per second) as a modem which implements a slower V.34 protocol.
Typically, an electronic systems maximum capacity is designed in accordance with the greatest task envisioned by the designers and support (e.g., clock speed, operating voltage, etc.) is continuously provided at maximized levels. This often results in significant inefficiencies. For example, a power supply and clock typically continue to provide a maximum voltage power signal and a maximum frequency clock signal to a processor even when the processor is capable of performing a task at a lower frequency and voltage level. Typically, the minimum frequency and power required to adequately perform many tasks is less than the maximum designed clock frequencies and voltage power levels but the electronic system continues to supply the maximum voltage power signal and maximum frequency clock signal. For example, when a V.90 capable modem is required to operate at less than its maximum speed (e.g., due to line conditions or compatibility with another modem) the maximum operational capacity to run V.90 is not utilized by the system but support (e.g., power supply levels) is nevertheless supplied at the maximum capacity level. Continuing to provide maximum power to a device operating at less than maximum capacity wastes limited energy resources.
Traditional attempts at electronic system power conservation are typically limited to times when no processing is required and often rely on bi-static techniques that are restricted to either turning on and off a clock or power supply. For example, some traditional processing systems attempt to conserve power by starting and stopping a processor""s clock when the processor is not required to be actively processing. Thus, it is typical for such devices to switch between a standby mode wherein the processor does no processing and a fully supported mode at maximum rates, even when a lesser degree of processing capability is adequate. Electronic systems often operate with a wide range of changing power requirements and traditional power conservation techniques do not maximize energy saving opportunities for varying ranges of active processing. For example, in traditional electronic processing systems the power supply continuously supports operation at the maximum rate during active processing and does not allow the device to variably throttle power consumption when the processing demands are less than maximum but greater than zero.
Some traditional power conservation techniques attempt to increase the granularity of performance control in electronic systems in which functionality is partitioned between multiple devices, subsystems or co-processors. For example, a subsystem that is not actively processing may be halted while another continues to function. This approach is still limited and fundamentally bi-static in nature with regards to any particular subsystem or co-process, the power supply continuously supports operation of the particular subsystem or coprocessor at the maximum rate and does not allow the device to variably throttle power consumption when the processing demands on the particular subsystem or co-processor are less than maximum but greater than zero. In addition, these traditional attempts compound inefficiencies by requiring extra hardware to implement each of the multiple subsystems.
As the components required to build an electronic system have reduced in size, new categories of systems have emerged. For example, one new category of computer systems is the hand held or xe2x80x9cpalmtopxe2x80x9d computer system. A palmtop computer system is a computer that is small enough to be held in the hand of a user and can be xe2x80x9cpalm-sized.xe2x80x9d Most palmtop computer systems are used to implement various Personal Information Management (PIM) applications such as an address book, a daily organizer and electronic notepads, to name a few. One of the primary advantages of a palmtop computer is mobility and the power source often comprises a relatively small internal battery with a limited life and ability to supply energy. Inefficient power consumption often has significant adverse affects on the ease of use and the battery life of handheld computers.
Another issue is ease of use or the degree of user intervention required to manage power conservation or adjust processing performance. Requiring a user to manually adjust (e.g., turn on or off) a power consuming circuit, for example through the graphical user interface or the buttons of the handheld computer, is typically less preferable to automatically adjusting processing performance and controlling energy expenditure. Further, requiring a user to manually control a circuit (e.g., turning off a modem) may pose problems if the user forgets or does not readjust the controls (e.g., turn the modem on) at the appropriate time (e.g., when a communication is sent to the user).
What is required is a system and method that dynamically adjusts performance of a processor. The system and method should be flexibly adaptable to various performance capabilities between a maximum performance level and a minimum performance level. The system and method should provide relative power conservation while permitting processing to be performed.
The present invention system and method dynamically adjusts the performance of a functional circuit (e.g., processor) and is flexibly adaptable to various performance capabilities between a maximum performance level and a minimum performance level. The dynamic performance adjustment system and method of the present invention provides relative power conservation while permitting processing to be performed. In one embodiment the present invention, a dynamic performance adjustment system and method are implemented in a handheld computer.
The present invention is a dynamic performance adjustment system and method that flexibly adjusts the clock frequency and the voltage of a functional circuit to adjust its performance. In one embodiment of the present invention, a dynamic performance adjustment system and method facilitates flexible power conservation. In one exemplary implementation of the present invention, a dynamic performance adjustment control circuit controls performance adjustments to a logic circuit (e.g., a processor) and adjusts support functions (e.g., power supply) for the logic circuit. The logic circuit performs operational functions (e.g., processing) or tasks that have different performance requirements. For example, some tasks performed by the logic circuit are required to be performed in a relatively short duration and other tasks performed by logic circuit have relatively longer time limitations. In one embodiment of the present invention, the dynamic performance adjustment control circuit adjusts the frequency and voltage at which the logic circuit operates to a relatively greater frequency and voltage for tasks required to be performed in a shorter duration of time, and adjusts the frequency and voltage at which the logic circuit operates to a relatively lower frequency and voltage for tasks with longer timing tolerances. In one embodiment of the present invention, a dynamic performance adjustment system and method includes provisions to manage a transition in performance and support functions in a manner that reduces the risk of spurious signals or xe2x80x9cglitches.xe2x80x9d